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FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Soft start values are determined by reading the FREQ and
ILIM1 pins respectively. A soft start cycle is then initiated to
ramp up the outputs. While channel 1 buck converter uses an
internal reference, channel 2 converter error amplifier uses
the voltage on the VREFOUT pin (V REF ) as its reference
voltage. V REF is equal to 1/2 V DDQ , where V DDQ is applied to
the VREFIN pin. This way, the 34716 assures that V REF and
V TT voltages track 1/2 V DDQ to meet DDR requirements.
Soft start is used to prevent the output voltage from
overshooting during startup. At initial startup, the output
capacitor is at zero volts; V OUT = 0 V. Therefore, the voltage
across the inductor will be PV IN during the capacitor charge
phase which will create a very sharp di/dt ramp. Allowing the
inductor current to rise too high can result in a large
difference between the charging current and the actual load
current that can result in an undesired voltage spike once the
capacitor is fully charged. The soft start is active each time
the IC goes out of standby or shutdown mode, power is
recycled, or after a fault retry.
To fully take advantage of soft starting, it is recommended
not to enable the V TT output before introducing VDDQ on the
VREFIN pin. If this happens after a soft start cycle expires
and the VREFIN voltage has a high dv/dt, the output will
naturally track it immediately and ramp up with a fast dv/dt
itself and that will defeat the purpose of soft starting. For
reliable operation, it is best to have the VDDQ voltage
available before enabling the V TT output.
After a successful start-up cycle where the device is
enabled, no faults have occurred, and the output voltages
have reached their regulation point, the 34716 pulls the
power good output signal low after a 10 ms reset delay, to
indicate to the host that the device is in normal operation.
PROTECTION FUNCTIONS
The 34716 monitors the application for several fault
conditions to protect the load from overstress. The reaction of
the IC to these faults ranges from turning off the outputs to
just alerting the host that something is wrong. In the following
paragraphs, each fault condition is explained:
Output Over-voltage
An over-voltage condition occurs once the output voltage
goes higher than the rising over-voltage threshold (V OVR ). In
this case, the power good output signal is pulled high, alerting
the host that a fault is present, but the outputs will stay active.
To avoid erroneous over-voltage conditions, a 20 μs filter is
implemented. The buck converter will use its feedback loop
to attempt to correct the fault. Once the output voltage falls
below the falling over-voltage threshold (V OVF ), the fault is
cleared and the power good output signal is pulled low, the
device is back in normal operation. The condition is the same
for both outputs.
Output Under-voltage
An under-voltage condition occurs once the output voltage
falls below the falling under-voltage threshold (V UVF ). In this
case, the power good output signal is pulled high, alerting the
avoid erroneous under-voltage conditions, a 20 μs filter is
implemented. The buck converter will use its feedback loop
to attempt to correct the fault. Once the output voltage rises
above the rising under-voltage threshold (V UVR ), the fault is
cleared and the power good output signal is pulled low, the
device is back in normal operation. The condition is the same
for both outputs.
Output Over-current
This block detects over-current in the Power MOSFETs of
the buck converter. It is comprised of a sense MOSFET and
a comparator for each channel. The sense MOSFET acts as
a current detecting device by sampling a ratio of the load
current. That sample is compared via the comparator with an
internal reference to determine if the output is in over-current
or not. If the peak current in the output inductor reaches the
over-current limit (I LIM ), the converter will start a cycle-by-
cycle operation to limit the current, and a 10 ms over-current
limit timer (t LIM ) starts. The converter will stay in this mode of
operation until one of the following occurs:
? The current is reduced back to the normal level before
t LIM expires, and in this case normal operation is
regained.
? t LIM expires without regaining normal operation, at
which point the device turns off the output and the
power good output signal is pulled high. At the end of a
timeout period of 100 ms (t TIMEOUT ), the device will
attempt another soft start cycle.
? The device reaches the thermal shutdown limit (T SDFET )
and turns off the output. The power good (PG) output
signal is pulled high.
? The output current keeps increasing until it reaches the
short-circuit current limit (I SHORT ). See below for more
details.
Short-circuit Current Limit
This block uses the same current detection mechanism as
the over-current limit detection block. If the load current
reaches the I SHORT value, the device reacts by shutting down
the output immediately. This is necessary to prevent damage
in case of a permanent short-circuit. Then, at the end of a
timeout period of 100 ms (t TIMEOUT ), the device will attempt
another soft start cycle.
Thermal Shutdown
Each channel has its own thermal shutdown block.
Thermal limit detection block monitors the temperature of the
device and protects against excessive heating. If the
temperature reaches the thermal shutdown threshold
(T SDFET ), the converter output switches off and the power
good output signal indicates a fault by pulling high. The
device will stay in this state until the temperature has
decreased by the hysteresis value and then After a timeout
period (T TIMEOUT ) of 100 ms, the device will retry
automatically and the output will go through a soft start cycle.
If successful normal operation is regained, the power good
output signal is asserted low to indicate that.
host that a fault is present, but the outputs will stay active. To
34716
Analog Integrated Circuit Device Data ?
Freescale Semiconductor
17
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